| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit and a probe card for preventing the deterioration of quality due to probing, and for using the same probe card for test even when chip sizes (forms) are different. SOLUTION: A plurality of rectangle chips 1 are formed so as to be arrayed on a wafer. A dicing line 2 is formed outside the chip 1 along the four sides of the chip 1. A plurality of pads 3 for wiring are formed so as to be arrayed inside the chip 1 along the four sides of the chip 1. A plurality of pads 4 for test are formed so as to be arrayed in preliminarily decided predetermined layout in the dicing line 2. Wiring 5 is configured to carry out the electric conduction of the pads 3 for wiring and the pads 4 for test. In this semiconductor integrated circuit 100, the pads 4 for test are not formed in the dicing line 2 in the horizontal direction of the paper, but formed in the dicing line 2 in the vertical direction of the paper. COPYRIGHT: (C)2005,JPO&NCIPI
|
