发明名称 |
SEMICONDUCTOR MEMORY DEVICE |
摘要 |
PROBLEM TO BE SOLVED: To perform good write-in of data for a memory cell, while constituting the memory cell with normal six transistors even if the device has such constitution that the data of a memory cell is outputted from one side of a pair of bit lines through a global bit line for read-out, in a semiconductor memory device. SOLUTION: This device is provided with a plurality of memory cell groups 101 having memory cells 100 of at least two or more. Each memory cell group 101 has a read-out part 103 and a write-in part 102. Data of the memory cell 100 is read out from one side of the bit lines BIT to the global bit line RGBIT through the read-out part 103. The write-in part 102 is shared by memory cells 100 of at least two or more in its own memory cell group 101. COPYRIGHT: (C)2005,JPO&NCIPI
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申请公布号 |
JP2005025859(A) |
申请公布日期 |
2005.01.27 |
申请号 |
JP20030190052 |
申请日期 |
2003.07.02 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
KANEHARA AKINARI;TSUJIMURA KAZUKI;SUMIYA NORIHIKO |
分类号 |
G11C11/417;G11C7/10;G11C7/12;G11C7/18;G11C11/41;G11C11/419;(IPC1-7):G11C11/417 |
主分类号 |
G11C11/417 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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