发明名称 DEVICE CONTROLLER
摘要 PROBLEM TO BE SOLVED: To efficiently use internal resources of an integrated circuit in regard to a device controller, with a restrained use amount of the flip-flop circuits (FF) in the integrated circuit. SOLUTION: To an access request from a central processing unit (CPU) 1-1, the internal portion of the integrated circuit of a device controller 1-2 receives the access request from the central processing unit (CPU) 1-1 via a CPU interface 1-21, generates and outputs a control signal which successively changes in time series in a sequencer 1-22 using a block RAM. Then, by outputting the control signal to a device 1-3 of control object, the device 1-3 of control object is controlled. Each data stored in the block RAM is successively output on a clock-by-clock basis, as sequence waveform data DOUT[0]-DOUT[n]. Each sequence waveform data DOUT[0]-DOUT[n] is input to the device 1-3 of control object as control signal. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005025688(A) 申请公布日期 2005.01.27
申请号 JP20030270713 申请日期 2003.07.03
申请人 FUJITSU LTD 发明人 UEDA SATOSHI;KONNO YUJI
分类号 G05B19/05;H03K19/173;(IPC1-7):G05B19/05 主分类号 G05B19/05
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