| 摘要 |
PROBLEM TO BE SOLVED: To evade the occurrence of data errors due to dependence and to execute a plurality of instructions out of order like parallel processing. SOLUTION: The computer system comprises an instruction fetch unit (106) and an execution unit (107) for executing instructions out of order. The execution unit (107) comprises a register file, a plurality of function units, a 1st bus for transferring data from the register file to the plurality of function units, a 2nd bus for transferring data from these function units to the register file, and loading/storing unit suited so as to request the loading of all instructions in an instruction window to a memory system out of order and the storing of all the instructions in the instruction window in order. COPYRIGHT: (C)2005,JPO&NCIPI |
