发明名称 Block distortion reduction apparatus
摘要 A block distortion reduction apparatus, enabling easy processing by a small-sized circuit configuration and enabling generation of block distortion reduction parameters by any area unit inside a frame, which averages encoding coefficients in a macroblock units to obtain a DCT parameter, calculates a DMV parameter of differential motion vectors by weighting in accordance with the encoding mode of the macroblock unit, and determines a correction value for the block distortion reduction based on these parameters.
申请公布号 US2005018922(A1) 申请公布日期 2005.01.27
申请号 US20040868836 申请日期 2004.06.17
申请人 SONY CORPORATION 发明人 HONMA KIMIYASU;SHIRAGA MITSUAKI;KOBAYASHI HIROSHI
分类号 H04N7/32;G06T5/00;H04N7/26;H04N7/50;(IPC1-7):G06T5/00 主分类号 H04N7/32
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