发明名称 METHOD OF FORMING GATE OF SEMICONDUCTOR DEVICE TO RESTRAIN ABNORMAL OXIDATION OF PVD TUNGSTEN SILICIDE LAYER
摘要 PURPOSE: A method of forming a gate of a semiconductor device is provided to restrain abnormal oxidation of a PVD tungsten silicide layer by forming a PETEOS oxide layer instead of an existing CVD TEOS oxide layer. CONSTITUTION: A gate oxide layer(12), a polysilicon layer(13), and a tungsten silicide layer(14) are formed on an upper surface of a semiconductor substrate(11). A PETEOS oxide layer(15) is formed on an upper surface of the tungsten silicide layer. A gate is formed by etching each predetermined region of the PETEOS layer, the tungsten silicide layer, and the polysilicon layer.
申请公布号 KR20050010258(A) 申请公布日期 2005.01.27
申请号 KR20030049292 申请日期 2003.07.18
申请人 MAGNACHIP SEMICONDUCTOR, LTD. 发明人 MUN, SEONG YEOL
分类号 H01L21/336;(IPC1-7):H01L21/336 主分类号 H01L21/336
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