发明名称 SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor device having a damascene gate or a replaced gate, wherein the uneven gate pattern density is small, and in a CMP process of exposing the upper surface of a dummy gate, dishing does not occur. SOLUTION: In the semiconductor device having the damascene gate or the replaced gate, a dummy gate 12a is additionally disposed at a position 14 except the gate formed position, whereby the uneven gate pattern density is reduced. Alternatively, the electrode of an interface transistor or an analog circuit capacitance is disposed in place of the dummy gate 12a, whereby the uneven gate pattern density is reduced. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005026586(A) 申请公布日期 2005.01.27
申请号 JP20030192418 申请日期 2003.07.04
申请人 SEMICONDUCTOR LEADING EDGE TECHNOLOGIES INC 发明人 MIYAGAWA KAZUHIRO;YASUHIRA MITSUO;AKASAKA YASUSHI;NISHIMURA ISAMU
分类号 H01L29/423;H01L21/3205;H01L21/336;H01L21/768;H01L21/822;H01L21/8234;H01L21/8238;H01L23/52;H01L27/04;H01L27/06;H01L27/088;H01L27/092;H01L29/41;H01L29/49;H01L29/78;(IPC1-7):H01L21/823;H01L21/320;H01L21/823 主分类号 H01L29/423
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