发明名称 |
Flash memory pipelined burst read operation circuit, method, and system |
摘要 |
Method and apparatus for use with flash memory devices and systems are included among the embodiments. In exemplary systems, a pipelined burst read operation allows the device to support higher data transfer rates than are possible with prior art burst read flash memory devices. Preferably, the flash memory device supports both non-pipelined and pipelined read operations, with the read mode settable from a memory controller. Other embodiments are described and claimed.
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申请公布号 |
US2005018480(A1) |
申请公布日期 |
2005.01.27 |
申请号 |
US20040852841 |
申请日期 |
2004.05.24 |
申请人 |
CHOI SOO-HWAN;PARK JUNG-HOON |
发明人 |
CHOI SOO-HWAN;PARK JUNG-HOON |
分类号 |
G11C16/26;(IPC1-7):G11C16/04 |
主分类号 |
G11C16/26 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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