发明名称 METHOD OF FORMING ISOLATION LAYER OF SEMICONDUCTOR DEVICE TO PREVENT REDUCTION OF HEIGHT OF ISOLATION LAYER AND REMOVE GROOVE BETWEEN ISOLATION REGION AND ACTIVE REGION
摘要 PURPOSE: A method of forming an isolation layer of a semiconductor device is provided to prevent the reduction of the isolation layer in its height and remove a groove formed between the isolation region and an active region by performing a CMP process posterior to a planarization etch process. CONSTITUTION: A laminated structure of a pad oxide layer pattern and a pad nitride layer pattern is formed on a semiconductor substrate(301) in order to define an isolation region. A trench(304) is formed on the isolation region. An insulating material layer(305) is formed thereon to bury the trench. The etch selectivity of the insulating material layer is controlled. The insulating material layer is removed from the pad nitride layer pattern by a planarization etch process using an etch selectivity difference. The ion implantation mask is removed therefrom. The entire surface of the semiconductor substrate is planarized by a CMP process.
申请公布号 KR20050009496(A) 申请公布日期 2005.01.25
申请号 KR20030048829 申请日期 2003.07.16
申请人 MAGNACHIP SEMICONDUCTOR, LTD. 发明人 LEE, WON KWON
分类号 H01L21/76;(IPC1-7):H01L21/76 主分类号 H01L21/76
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