发明名称 Multi-port scan chain register apparatus and method
摘要 A memory apparatus, which may be of resistive cross point memory (RXPtM) cell type (one example of which is a magnetic random access memory (MRAM)) includes multiple serial data paths which are merged and may exchange data as needed by the data input/output (I/O) circuits connected to a serial I/O port. A plurality of scan path registers are connected by an array of static random access memory (SRAM) memory units of plural memory cells. The scan paths and SRAM memory units perform a parallel transfer of data from scan path registers to and from temporary registers of the SRAM memory units in order to effect parallel data exchange between the multiple scan path registers.
申请公布号 US6848067(B2) 申请公布日期 2005.01.25
申请号 US20020107939 申请日期 2002.03.27
申请人 HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. 发明人 PERNER FREDERICK A.
分类号 G01R31/28;G06F11/22;G11C7/10;G11C11/16;G11C11/41;G11C11/413;G11C19/00;G11C29/48;(IPC1-7):G01R31/28 主分类号 G01R31/28
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