发明名称 Method and apparatus for faster block size calculations for interleaving
摘要 An interleaver for any modem or transmitter which transmits digital data. The interleaver eliminates the iterative divide step of a first prior art method to calculate the final depth of each block and the divide followed by a multiply step of a second prior art method. This is done by calculating the minimum depth, i.e., number of rows, for each 2-D block of data using a divide step and retaining the remainder. The remainder is used to determine how many blocks get an extra row when the burst length and width of each row precludes all blocks from having the same number of rows.
申请公布号 US6848036(B1) 申请公布日期 2005.01.25
申请号 US20000648278 申请日期 2000.08.23
申请人 TERAYON COMMUNICATION SYSTEMS, INC. 发明人 DAVE SANJAY SHASHI;TEPMONGKOL WARANGKANA;HUBRIS ALEXANDER
分类号 G06F12/00;H03M13/27;(IPC1-7):G06F12/00 主分类号 G06F12/00
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