发明名称 |
METHOD FOR FORMING GATE ELECTRODE OF SEMICONDUCTOR DEVICE TO IMPROVE CRYSTALLINITY OF UPPER AND LOWER ELECTRODE MATERIAL LAYERS ADJACENT TO RUTHENIUM OXIDE LAYER EVEN AFTER HIGH TEMPERATURE HEAT TREATMENT AND REDUCE SHEET RESISTANCE OF GATE ELECTRODE |
摘要 |
PURPOSE: A method for forming a gate electrode of a semiconductor device is provided to improve crystallinity of upper and lower electrode material layers adjacent to a ruthenium oxide layer even after a high temperature heat treatment and reduce sheet resistance of a gate electrode by depositing the ruthenium oxide layer between a polysilicon layer and a tungsten layer such that the ruthenium oxide layer is oxidizing metal and has good electrical conductivity and physical/chemical stability. CONSTITUTION: A gate insulation layer(102) is formed on a semiconductor substrate(101). A polysilicon layer(103) is deposited on the gate insulation layer. A ruthenium oxide layer(104) is deposited on the polysilicon layer. A metal layer is deposited on the ruthenium oxide layer. The resultant structure including the metal layer is patterned to form a gate electrode.
|
申请公布号 |
KR20050009531(A) |
申请公布日期 |
2005.01.25 |
申请号 |
KR20030048864 |
申请日期 |
2003.07.16 |
申请人 |
MAGNACHIP SEMICONDUCTOR, LTD. |
发明人 |
CHUN, JAE KYU |
分类号 |
H01L21/336;(IPC1-7):H01L21/336 |
主分类号 |
H01L21/336 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|