发明名称 METHOD OF FORMING ISOLATION LAYER OF SEMICONDUCTOR DEVICE TO SECURE MARGIN OF CMP PROCESS AND IMPROVE ELECTRICAL CHARACTERISTIC BY PREVENTING REDUCTION OF HEIGHT OF ISOLATION LAYER
摘要 PURPOSE: A method of forming an isolation layer of a semiconductor device is provided to secure a margin of a CMP process and improve an electrical characteristic by preventing the reduction of the isolation layer in its height and removing a groove formed between the isolation region and an active region. CONSTITUTION: A pad oxide layer pattern and a pad nitride layer pattern are laminated on a semiconductor substrate(301) in order to define an isolation region. A trench(304) is formed on the isolation region. An insulating material layer(305) is formed thereon to bury the trench. A silicon layer is formed on the insulating material layer. An ion implantation mask is formed on the isolation region. An oxide layer is formed by oxidizing the silicon layer of an active region except for the silicon layer of the isolation region. The ion implantation mask is removed therefrom. The insulating material layer is removed from the pad nitride layer by performing an etch process using etch selectivity. A CMP process is performed to planarize a top part of the semiconductor substrate.
申请公布号 KR20050009495(A) 申请公布日期 2005.01.25
申请号 KR20030048828 申请日期 2003.07.16
申请人 MAGNACHIP SEMICONDUCTOR, LTD. 发明人 LEE, WON KWON
分类号 H01L21/76;(IPC1-7):H01L21/76 主分类号 H01L21/76
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