SIGNAL PROCESSING DEVICE FOR MODULATING MAIN CLOCK AND METHOD THEREOF

摘要

PURPOSE: A signal processing device for modulating a main clock and a method thereof are provided to reduce the EMI(ElectroMagnetic Interference) without using a VCO(Voltage Controlled Oscillator) or PLL(Phase Locked Loop) circuit by modulating the clock. CONSTITUTION: A clock generator(50) includes a delay for generating the first delay clock delaying the main clock as much as the first delay time and the second delay clock delaying the main clock as much as the second delay time. The first processing block(41) processes an input signal by receiving the first delay clock. The second processing block(42) processes the input signal by receiving the second delay clock.