发明名称
摘要 The disclosure is a non-volatile semiconductor memory device including a bias circuit that generates a bias voltage for controlling an NMOS transistor connected to both a bit line and a page buffer circuit. The bias circuit generates a first voltage, which is greater than a power source voltage, as the bias signal in a precharge period of a read operation. The bias circuit also generates a second voltage, which is less than the power source voltage, as the bias signal in a sensing period of the read operation.
申请公布号 KR100466981(B1) 申请公布日期 2005.01.24
申请号 KR20020011275 申请日期 2002.03.04
申请人 发明人
分类号 G11C16/06;G11C16/30;G11C5/14;G11C16/02;G11C16/24 主分类号 G11C16/06
代理机构 代理人
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