发明名称
摘要 A current controlled matrix addressable display includes a charging transistor, a driving transistor and a switching transistor that control current flow to a light-emitting assembly. The control circuit is driven by a row signal, a column signal and a clocking signal. The column signal is a combination of an image component and a pulsed charging component. The image component establishes a gate voltage that is trapped at the gate of the charging transistor by the switching transistor in response to the row signal. The clocking signal and the charging component form pulse pairs that transfer charge from a column line to a common node and then from the common node to the light-emitting assembly. The intensity of light is controlled by the voltage difference between the image component and the voltage of the clocking signal. Additionally, the intensity of emitted light can be controlled by controlling the number of pulse pairs in a return interval during which the pulse pairs arrive.
申请公布号 KR100467124(B1) 申请公布日期 2005.01.24
申请号 KR19997006173 申请日期 1999.07.07
申请人 发明人
分类号 G09G3/30;G09G3/20;G09G3/22 主分类号 G09G3/30
代理机构 代理人
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