发明名称 |
CACHE MEMORY DEVICE HAVING BUFFER DYNAMICALLY ALLOTTED OR DEALLOCATED REGARDLESS OF ADDRESS AND SIZE, DIGITAL DATA PROCESSING DEVICE EQUIPPED WITH THE SAME, AND METHOD THEREOF |
摘要 |
PURPOSE: A cache memory device having a buffer dynamically allotted or deallocated regardless of an address and a size, a digital data processing device equipped with the same, and a method thereof are provided to allow a system using a cache memory to efficiently access the cache memory by dynamically allocating a part of the cache memory as the buffer or deallocating it. CONSTITUTION: The cache memory(120) is equipped with a tag memory and a data memory, and is used as a floating buffer by dynamically allocating or deallocating partial blocks of the tag memory and the corresponding data memory. A cache controller(123) controls allocation or deallocation when a processor(130) accesses the cache memory. The cache controller is equipped with a controlling part generating a buffer block allocating or deallocating control signal and an index storing register/mode setting circuit. When the processor accesses the cache memory, the index storing register/mode setting circuit generates a buffer block allocating or deallocating request signal and outputs one of a preset index address or mode.
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申请公布号 |
KR20050007907(A) |
申请公布日期 |
2005.01.21 |
申请号 |
KR20030047539 |
申请日期 |
2003.07.12 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
CHO, SANG YEUN;JUNG, WOO YOUNG |
分类号 |
G06F12/08;(IPC1-7):G06F12/08 |
主分类号 |
G06F12/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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