发明名称 METHOD FOR FORMING GATE ELECTRODE OF SEMICONDUCTOR DEVICE TO REDUCE CD DIFFERENCE BETWEEN GATE ELECTRODE PATTERNS IN DENSE AND ISOLATED GATE ELECTRODE PATTERN FORMATION REGIONS
摘要 PURPOSE: A method for forming a gate electrode of a semiconductor device is provided to reduce a CD(critical dimension) difference between gate electrode patterns in dense and isolated gate electrode pattern formation regions by making an oxide layer for forming the gate electrode pattern thin. CONSTITUTION: A gate oxide layer(12), a conductive layer, a metal silicide layer and an oxide layer(18) are sequentially formed on a semiconductor substrate(10) wherein the oxide layer has such a thickness to shorten an interval of time for an etch process and reduce the quantity of polymer generated in the etch process. After a photoresist pattern(PR) is formed in a predetermined region of the oxide layer, an etch process is performed on the oxide layer to pattern oxide layer by using the photoresist pattern as an etch mask such that the oxide layer is proper for regions for dense and isolated gate electrode patterns. The metal silicide layer, the conductive layer and the gate oxide layer are etched to form a gate electrode pattern by using the patterned oxide layer as an etch mask.
申请公布号 KR20050007633(A) 申请公布日期 2005.01.21
申请号 KR20030047111 申请日期 2003.07.11
申请人 MAGNACHIP SEMICONDUCTOR, LTD. 发明人 MUN, SEONG YEOL
分类号 H01L21/336;(IPC1-7):H01L21/336 主分类号 H01L21/336
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