| 摘要 |
PROBLEM TO BE SOLVED: To reduce the circuit scale of a video signal processing apparatus for applying a plurality of matrix arithmetic operations to a first video signal and outputting the result as a second video signal. SOLUTION: A CPU 1 generates matrices for video adjustment under the operations of an operation section 3 and stores the matrices to the matrix storage sections 21c, 21f of a memory 2. Matrix storage sections 21d, 21e store matrices for color space conversion. The matrices for the video adjustment and the matrices for the color space conversion are subjected to composite arithmetic operations by software and the composed matrix is stored in a matrix storage section 21g. A matrix arithmetic unit 4 or 40 being hardware receives the composed matrix to convert the first video signal (SDTV signal) into the second video signal (HDTV signal). COPYRIGHT: (C)2005,JPO&NCIPI
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