| 摘要 |
An inhibitable switching circuit comprising a back to back diode switch and an inhibit circuit connected to the back to back diode switch. The back to back diode switch comprises first and second diodes each having a first polarity region and a second polarity region, the first and second diodes being connected in series back to back with the first polarity region of the first diode connected to the first polarity region of the second diode. The back to back diode also comprises a first input terminal connected to the second polarity region of the first diode, an output terminal connected between the first and second diodes and a third terminal connected to the second polarity region of the second diode. The back to back diode switch is operable to generate a switching output at the output terminal in response to an input signal at the first terminal provided the input pulse duration is less than the storage and delay times of the first and second diodes. The inhibit circuit comprises an output connected to the third terminal of the back to back diode switch and at least a first input for receiving an inhibit circuit control signal, the inhibit circuit further comprising circuit means for selectively generating an inhibit signal on the inhibit circuit output in response to an appropriate input control signal, the inhibit signal acting to modify the output of the back to back diode switch. |
