发明名称 CIRCUIT FOR TESTING AND FINE TUNING INTEGRATED CIRCUIT (SWITCH CONTROL CIRCUIT)
摘要 A switch controlling circuit for the testing and fine-tuning of integrated circuits comprising of a series of flip-flops (30, 32, ..., 34) chained together in a serial manner. The contents of the flip-flop are shifted in from an input (38) leading to the first flip­flop (30) in the chain. The output of each flip-flop connects to individual transistor switch (F1, F2, ..., Fn) whereby the states of the flip-flops control the state of the switches. Circuitry (50, 52, ..., 54) for establishing a default state of the switches may be provided.
申请公布号 WO2005006394(A2) 申请公布日期 2005.01.20
申请号 WO2004US17820 申请日期 2004.06.07
申请人 ATMEL CORPORATION 发明人 NG, PHILIP, S.;YE, KEN KUN;SON, JINSHU
分类号 G01R31/30;G11C5/14;G11C8/08;G11C29/02;H03K3/037;H03K3/356 主分类号 G01R31/30
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