发明名称 METHOD FOR FORMING TRENCH-TYPE ISOLATION LAYER OF SEMICONDUCTOR DEVICE TO PREVENT GATE OXIDE LAYER FROM BEING DECREASED IN QUALITY AND AVOID LIFTING PHENOMENON IN HIGH TEMPERATURE TREATMENT
摘要 PURPOSE: A method for forming a trench-type isolation layer of a semiconductor device is provided to prevent a gate oxide layer from being decreased in quality and avoid a lifting phenomenon in a high temperature treatment by using an HDP(high density plasma) insulation layer as an etch stop layer in a process for planarizing an isolating insulation layer. CONSTITUTION: A mask pattern is formed on a semiconductor substrate(40). A trench(46) is formed in the semiconductor substrate by using the mask pattern as an etch mask. An isolating insulation layer for filling the trench is formed on the front surface of the mask pattern. The insulation layer is planarized until the interface of the mask pattern is exposed. The mask pattern is eliminated. A pad oxide layer and the first insulation layer are sequentially formed and patterned to form the mask pattern. The first insulation layer is one of an HDP-Sin layer, an HDP CVD(chemical vapor deposition) SiN layer or an HDP SiON layer.
申请公布号 KR100468692(B1) 申请公布日期 2005.01.20
申请号 KR19970048062 申请日期 1997.09.22
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 KIM, JIN WON
分类号 H01L21/76;(IPC1-7):H01L21/76 主分类号 H01L21/76
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