发明名称 |
Methods of increasing the reliability of a flash memory |
摘要 |
A multi-level flash memory cell is read by comparing the cell's threshold voltage to a plurality of integral reference voltages and to a fractional reference voltage. Multi-level cells of a flash memory are programmed collectively with data and redundancy bits at each significance level, preferably with different numbers of data and redundancy bits at each significance level. The cells are read collectively, from lowest to highest significance level, by correcting the bits at each significance level according to the redundancy bits and adjusting the bits of the higher significance levels accordingly. The adjustment following the correction of the least significant bits is in accordance with comparisons of a cell's threshold voltages to fractional reference voltages.
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申请公布号 |
US2005013171(A1) |
申请公布日期 |
2005.01.20 |
申请号 |
US20040867646 |
申请日期 |
2004.06.16 |
申请人 |
BAN AMIR;LITSYN SIMON;ALROD IDAN |
发明人 |
BAN AMIR;LITSYN SIMON;ALROD IDAN |
分类号 |
G11C11/34;G11C11/56;G11C16/26;(IPC1-7):G11C11/34 |
主分类号 |
G11C11/34 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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