发明名称 |
AUTOMATIC SELF TEST OF AN INTEGRATED CIRCUIT VIA AC I/O LOOPBACK |
摘要 |
<p>A multi-bit test value is loaded into a built-in latch of the IC component, and a pad of the component is selected for testing. A number of different sequences of test values are automatically generated, based on the stored test value, without scanning-in additional multi-bit values into the latch. A signal that is based on the different sequences of test values is driven into the selected pad and looped back. A difference between the test values and the looped back version of the test values is determined, while automatically adjusting driver and/or receiver characteristics to determine a margin of operation of on-chip I/O buffering for the selected pad.</p> |
申请公布号 |
WO2005006189(A1) |
申请公布日期 |
2005.01.20 |
申请号 |
WO2004US19164 |
申请日期 |
2004.06.16 |
申请人 |
INTEL CORPORATION |
发明人 |
QUERBACH, BRUCE;ELLIS, DAVID;KHAN, AMJAD;TRIPP, MICHAEL;GAYLES, ERIC;GOLLAPUDI, ESHWAR |
分类号 |
G01R31/317;G01R31/3185;G06F11/27;(IPC1-7):G06F11/267;G01R31/318 |
主分类号 |
G01R31/317 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|