发明名称 METHOD AND APPARATUS FOR IMPLEMENTING POWER OF TWO FLOATING POINT ESTIMATION
摘要 PROBLEM TO BE SOLVED: To provide a method and an apparatus for implementing a power of two estimation function in a general purpose floating point processor. SOLUTION: The floating point number is stored within a memory. The floating point number includes a sign bit, a plurality of exponent bits, and a mantissa having an implied bit and multiple fraction bits. In response to a floating point instruction, the mantissa is partitioned into an integer part and a fraction part, based on the value of the exponent bits. A floating number result is formed by assigning an integer part of the floating-point number as an unbiased exponent of the floating-point result, and by utilizing combinational logic hardware for converting a fraction part of the floating point number to the fraction part of the floating point result. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005018759(A) 申请公布日期 2005.01.20
申请号 JP20040173184 申请日期 2004.06.10
申请人 INTERNATL BUSINESS MACH CORP 发明人 FOSSUM GORDON C;SCHWINN STEPHEN J;MARTIN S SCHMUKER;TUBBS MATTHEW R
分类号 G06F7/552;G06F7/38;G06F7/483;G06F7/556;(IPC1-7):G06F7/552 主分类号 G06F7/552
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