发明名称 CELL WITH FIXED OUTPUT VOLTAGE FOR INTEGRATED CIRCUIT
摘要 The circuit has a cell (34), which has an output with a fixed output voltage when the circuit is in operation mode. The cell has a flip-flop (11) and a unit (31) for setting the output voltage when the circuit is in the operation mode. The unit (31) is regulated by a control signal, which depends on a mode signal (15) that indicates whether the circuit is in the operation mode or in the test mode.
申请公布号 KR20050007548(A) 申请公布日期 2005.01.19
申请号 KR20047018553 申请日期 2003.05.15
申请人 发明人
分类号 G01R31/3181;H01L27/04;G01R31/3185;H01L21/822;H03K17/00;H03K19/00 主分类号 G01R31/3181
代理机构 代理人
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