发明名称 METHOD FOR FORMING ISOLATION LAYER OF SEMICONDUCTOR DEVICE TO PREVENT GENERATION OF MOAT
摘要 PURPOSE: A method for forming an isolation layer of a semiconductor device is provided to prevent generation of a moat by previously compensating for the thickness of a lateral field oxide layer recessed in the next process to a nitride layer removing process. CONSTITUTION: A pad oxide layer and a pad nitride layer are sequentially formed on a semiconductor substrate(31). The pad nitride layer is selectively removed. The pad oxide layer and the semiconductor substrate are sequentially eliminated to form a trench(39) in the semiconductor substrate. An HDP oxide layer is gap-filled on the resultant structure including the trench. The HDP oxide layer and the pad nitride layer are planarized. After the residual pad nitride layer is eliminated, a polysilicon layer is formed on the planarized HDP oxide layer including the pad oxide layer. The polysilicon layer is selectively removed to form a polysilicon layer spacer on the side surface of the HDP oxide layer. After the residual pad oxide layer is removed, the portion from which the pad oxide layer is removed and the polysilicon layer spacer are sacrificially oxidized by a sacrificial oxide process. An isolation layer(43a) is selectively formed in the sacrificially oxidized portion.
申请公布号 KR20050006508(A) 申请公布日期 2005.01.17
申请号 KR20030046347 申请日期 2003.07.09
申请人 MAGNACHIP SEMICONDUCTOR, LTD. 发明人 CHOI, MYUNG GYU
分类号 H01L21/76;(IPC1-7):H01L21/76 主分类号 H01L21/76
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