发明名称 Semiconductor integrated circuit device
摘要 Conventionally, when a burn-in test is performed by means of utilizing a memory BIST circuit, a control of a reset operation for the memory BIST circuit is required from an external source. According to the present invention, it is configured that the memory BIST circuit is used for the burn-in test of a memory macro, and a BIST reset control circuit detects a memory BIST test completion signal from the memory BIST circuit, and automatically resets the memory BIST circuit. Thereby, repetitive continuous tests to the memory macro by the memory BIST circuit can be achieved, and the burn-in test by means of utilizing the memory BIST circuit can be performed.
申请公布号 US2005007172(A1) 申请公布日期 2005.01.13
申请号 US20040886672 申请日期 2004.07.09
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 SADAKATA HIROYUKI;NOMURA KOICHIRO;SAKAMOTO SHOJI
分类号 G01R31/28;G11C29/00;G11C29/06;G11C29/12;G11C29/14;G11C29/46;H03K3/289;(IPC1-7):H03K3/289 主分类号 G01R31/28
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