发明名称 METHOD OF FORMING SHALLOW TRENCH ISOLATION USING DEEP TRENCH ISOLATION
摘要 A method of isolating active areas of a semiconductor workpiece. Deep trenches are formed in a workpiece between adjacent first active areas, and an insulating layer and a semiconductive material are deposited in the deep trenches. The semiconductive material is recessed below a top surface of the workpiece. Shallow trenches are formed in the workpiece between adjacent second active areas, and an insulating material is deposited in the shallow trenches and in the semiconductive material recess. The deep trenches may also be formed between an adjacent first active area and second active area. The first active areas may be high voltage devices, and the second active areas may be low voltage devices. The shallow trench isolation over the recessed semiconductive material in the deep trenches is self-aligned.
申请公布号 US2005009290(A1) 申请公布日期 2005.01.13
申请号 US20030615630 申请日期 2003.07.09
申请人 YAN JIANG;SHUM DANNY PAK-CHUM 发明人 YAN JIANG;SHUM DANNY PAK-CHUM
分类号 H01L21/762;H01L21/763;(IPC1-7):H01L21/76 主分类号 H01L21/762
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