发明名称 Method for in-line testing of flip-chip semiconductor assemblies
摘要 Flip-chip semiconductor assemblies, each including integrated circuit (IC) dice and an associated substrate, are electrically tested before encapsulation using an in-line or in-situ test socket or probes at a die-attach station. Those assemblies using "wet" quick-cure epoxies for die attachment may be tested prior to the epoxy being cured by pressing the integrated circuit (IC) dice against interconnection points on the substrate for electrical connection, while those assemblies using "dry" epoxies may be cured prior to testing. In either case, any failures in the dice or in the interconnections between the dice and the substrates can be easily fixed, and the need for the use of known-good-die (KGD) rework procedures during repair is eliminated.
申请公布号 US2005007142(A1) 申请公布日期 2005.01.13
申请号 US20040900771 申请日期 2004.07.27
申请人 COBBLEY CHAD A.;VANNORTWICK JOHN;STREET BRET K.;JIANG TONGBI 发明人 COBBLEY CHAD A.;VANNORTWICK JOHN;STREET BRET K.;JIANG TONGBI
分类号 G01R1/04;(IPC1-7):G01R31/26 主分类号 G01R1/04
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