发明名称 LSI DEVICE
摘要 <p><P>PROBLEM TO BE SOLVED: To provide an LSI device enabling efficient settings for switching between an external terminal and function blocks while alleviating the burden of a CPU. <P>SOLUTION: The LSI device includes a CPU 201 and a plurality of function blocks controlling an external device. An external terminal 20 connected to the external device is shared among the plurality of function blocks. The LSI is also provided with a group of mode registers 202 for which flag information indicating whether each function block is valid or invalid is set by the CPU; an input switching selector 206 and an output switching selector 207 for switching the connection between each function block and the external terminal; and a switching controller 205 which holds the order of priority among the function blocks and which controls the switching of the selectors according to the order of priority and the flag information set in the group of mode registers. <P>COPYRIGHT: (C)2005,JPO&NCIPI</p>
申请公布号 JP2005010966(A) 申请公布日期 2005.01.13
申请号 JP20030172738 申请日期 2003.06.18
申请人 OLYMPUS CORP 发明人 SHIMAMURA MASAMI;SOGA WAZA
分类号 G06F15/78;G06F13/38;G06F13/40;G06F17/00;H01L21/82;H01L21/822;H01L27/04;(IPC1-7):G06F13/38 主分类号 G06F15/78
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