SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF FOR PREVENTING DEGRADATION OF DATA PROPERTIES AND INCREASE OF SHORT CIRCUIT DUE TO CHARGE LEAKAGE

摘要

PURPOSE: A semiconductor memory device and a manufacturing method thereof are provided to prevent degradation of data properties and increase of short circuit due to charge leakage by ensuring isolation properties between first and second conductive layers. CONSTITUTION: A device isolation layer(4) is arranged between plural memory cell columns. A first conductive layer(3) is divided by the device isolation layers and is formed on the gate insulating layer of the cell area in order to compose a part of a memory cell transistor included in the adjacent memory cell columns. A first conductive interlayer dielectric(5) is formed with an insulating layer including silicon and nitrogen, is arranged on a top part of the first conductive layer, and is included in the adjacent memory cell columns. A second conductive interlayer layer(6) is formed with an insulating layer different from the first conductive interlayer layer and is arranged on the conductive interlayer dielectric. A second conductive layer(7) is arranged on the second conductive interlayer layer.