发明名称 SUPERVISORY CIRCUIT FOR MONITORING THE FORMATION AND TERMINATION OF INTERCONNECTIONS IN A TIME-DIVISION SWITCH
摘要 A processor applies address data to individual time slots on an address bus to direct data in corresponding time slots on a data bus to outgoing channels. A supervisory circuit produces multi-byte messages describing processor transactions (formation of and taking down connections, et cetera) and produces accompanying address words to direct the messages to an outgoing monitoring path. If a time slot on the address bus does not contain an address word, indicating that this time slot is idle, a byte in the transaction message is inserted in the corresponding time slot on the data bus and the accompanying address word is written into the idle time slot on the address bus.
申请公布号 US3705267(A) 申请公布日期 1972.12.05
申请号 USD3705267 申请日期 1971.09.03
申请人 BELL TELEPHONE LAB. INC. 发明人 PATRICK JOHN MARINO
分类号 H04J3/12;H04Q11/04;(IPC1-7):H04J3/12 主分类号 H04J3/12
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