发明名称 Semiconductor device and method of fabricating semiconductor device with high CMP uniformity and resistance to loss that occurs in dicing
摘要 In the semiconductor device of the present invention, a plurality of dummy patterns are formed in a grid arrangement in the scribe line areas of a wafer, and a plurality of dummy patterns are formed in a diagonally forward skipped arrangement in the chip interior areas of the wafer. Altering the arrangement of dummy patterns in the chip interior areas and scribe line areas in this way enables formation of dummy patterns with greater uniformity in the chip interior areas and enables formation of dummy patterns with greater resistance to loss that occurs when dicing in scribe line areas.
申请公布号 US6841880(B2) 申请公布日期 2005.01.11
申请号 US20030715503 申请日期 2003.11.19
申请人 NEC ELECTRONICS CORPORATION 发明人 MATSUMOTO AKIRA;FUKASE TADASHI;IGUCHI MANABU
分类号 H01L23/52;H01L21/301;H01L21/3205;H01L21/321;H01L21/44;H01L21/70;H01L21/768;H01L21/78;H01L21/82;H01L21/822;H01L23/48;H01L23/544;H01L23/58;H01L27/04;(IPC1-7):H01L23/48 主分类号 H01L23/52
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