发明名称 Signal processing apparatus and method, and data recording/reproducing apparatus using the same
摘要 A signal processing apparatus capable of reducing burst error generation, and a highly reliable data recording/reproducing apparatus using this signal processing apparatus. This signal processing apparatus has a simple error detection/correction circuit provided just before a modulated code demodulator, thereby correcting error of a pattern easy to occur in a maximum likelihood decoder. The simple error detection/correction circuit is an error detection/correction circuit using a linear error correction code, for example, an error correction code (CRCC) formed of a cyclic code. Thus the number of burst errors after the modulated code demodulator can be decreased.
申请公布号 US6842875(B2) 申请公布日期 2005.01.11
申请号 US20020269866 申请日期 2002.10.15
申请人 HITACHI, LTD. 发明人 KONDO MASAHARU;MITA SEIICHI
分类号 G11B20/14;G11B20/18;H03M13/00;H03M13/31;(IPC1-7):H03M13/00 主分类号 G11B20/14
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