Content addressable memory with cascaded array

摘要

A content addressable memory (CAM) device having a cascaded CAM array. The cascaded CAM array includes a first array of CAM cells and a second array of CAM cells. A first plurality of compare signal lines is coupled to the first array CAM cells and a second plurality of compare signal lines coupled to the second array of CAM cells. A plurality of storage elements have inputs coupled to the first plurality of compare signal lines and outputs coupled to the second plurality of compare signal lines.