发明名称 DSP data type matching for operation using multiple functional units
摘要 An instruction set architecture (ISA) for application specific signal processor (ASSP) is tailored to digital signal processing applications. The ISA implemented with the ASSP, is adapted to DSP algorithmic structures. The ISA of the present invention includes flexible data typing, permutation, and type matching of operands. The flexible data typing, permutation and type matching of operands provides programming flexibility to support different filtering and DSP algorithms having different types of filter coefficients or data samples. A data typer and aligner within each signal processing unit within the ASSP supports flexible data typing, permutation and type matching of operands of the instruction set architecture.
申请公布号 US6842850(B2) 申请公布日期 2005.01.11
申请号 US20030374444 申请日期 2003.02.25
申请人 INTEL CORPORATION 发明人 GANAPATHY KUMAR;KANAPATHIPILLAI RUBAN
分类号 G06F5/00;G06F7/48;G06F7/52;G06F7/53;G06F7/533;G06F7/544;G06F7/57;G06F9/30;G06F9/302;G06F9/318;G06F9/38;G06F17/10;(IPC1-7):G06F9/302 主分类号 G06F5/00
代理机构 代理人
主权项
地址