发明名称 |
METHOD FOR FORMING GATE ELECTRODE OF STACK STRUCTURE IN SEMICONDUCTOR DEVICE USING PHYSICAL VAPOR DEPOSITION |
摘要 |
PURPOSE: A method for forming a gate electrode of a semiconductor device is provided to improve reliability of a gate oxide layer by forming a stacked gate pattern of a metal film/a barrier layer/a polysilicon layer using PVD(Physical Vapor Deposition). CONSTITUTION: A gate oxide layer(21) and a conductive layer(22) are sequentially formed on a substrate(20). A barrier layer(23) is formed on the conductive layer. A metal film(24) is formed on the barrier layer by using PVD under fluorine-containing gas atmosphere. A hard mask(25) is formed on the metal film. A stacked gate electrode is then formed by patterning the stacked structure using the hard mask.
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申请公布号 |
KR20050002067(A) |
申请公布日期 |
2005.01.07 |
申请号 |
KR20030043113 |
申请日期 |
2003.06.30 |
申请人 |
HYNIX SEMICONDUCTOR INC. |
发明人 |
CHO, HEUNG JAE;HONG, BYUNG SEOP;JANG, SE AUG;LIM, KWAN YONG;YANG, HONG SEON |
分类号 |
H01L21/28;(IPC1-7):H01L21/28 |
主分类号 |
H01L21/28 |
代理机构 |
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地址 |
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