发明名称 |
METHOD OF FORMING LANDING PLUG STRUCTURE WITHOUT BRIDGE BETWEEN GATE ELECTRODE AND BIT LINE OR STORAGE NODE ELECTRODE |
摘要 |
PURPOSE: A method of forming a landing plug structure is provided to prevent the bridge between a damaged gate electrode and a bit line or a storage node electrode by forming a first landing plug in a bit line contact region and forming sequentially a second landing plug in a storage node contact region without CMP(Chemical Mechanical Polishing). CONSTITUTION: A semiconductor substrate(20) with a plurality of gate electrodes(23) is provided. A first insulating layer(25) with a first contact hole(26) for exposing a bit line contact region to the outside is formed thereon. A first landing plug(27a) is filled in the first contact hole. An ONON(Oxide Nitride Oxide Nitride) structure layer composed of a second to fifth insulating layer is formed thereon. A photoresist pattern is formed on the fifth insulating layer. A first pattern for exposing the third insulating layer to the outside is formed by etching selectively the fifth and fourth insulating layers using the photoresist pattern as an etching mask. A conductive spacer(33) is formed at both sidewalls of the first pattern. A second contact hole(34) is formed by etching the third to first insulating layers using the conductive spacer as an etching mask. A second landing plug(35a) is filled in the second contact hole.
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申请公布号 |
KR20050002479(A) |
申请公布日期 |
2005.01.07 |
申请号 |
KR20030043858 |
申请日期 |
2003.06.30 |
申请人 |
HYNIX SEMICONDUCTOR INC. |
发明人 |
JEON, WEON CHUL |
分类号 |
H01L21/28;(IPC1-7):H01L21/28 |
主分类号 |
H01L21/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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