| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit having an I/O circuit which can enhance electrostatic discharge resistance without lowering hot carrier resistance. SOLUTION: The semiconductor integrated circuit connects a first low withstand voltage MOS transistor M1 having a low breakdown voltage and connected in parallel with an output MOS transistor M2, connects a second low withstand voltage MOS transistor M4 having a low breakdown voltage between terminals of a power source, discharges a surge current first by a parasitic bipolar operation of the first low withstand voltage MOS transistor M1 when an ESD surge is applied to an external terminal T1, and discharges the surge current by the parasitic bipolar operation of a second low withstand voltage MOS transistor M4. COPYRIGHT: (C)2005,JPO&NCIPI
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