发明名称 Configurable, fast, 32-bit CRC generator for 1-byte to 16-bytes variable width input data
摘要 A method and circuit for performing CRC calculations permits variable width data input. Preferably, multiple CRC calculations are performed in parallel, each CRC calculation involving a different number of data bits from the data word and terminating within one clock cycle. The CRC polynomial is preferably incorporated into the hardware for each CRC calculation.
申请公布号 US2005005224(A1) 申请公布日期 2005.01.06
申请号 US20030601175 申请日期 2003.06.19
申请人 RIDGEWAY JEREMY;BEHERA SUPARNA;VISWANATH RAVINDRA 发明人 RIDGEWAY JEREMY;BEHERA SUPARNA;VISWANATH RAVINDRA
分类号 H03M13/00;H03M13/09;(IPC1-7):H03M13/00 主分类号 H03M13/00
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