| 摘要 |
<P>PROBLEM TO BE SOLVED: To lower the saturation voltage of a DMOS transistor without lowering breakdown strengths among each element of a bipolar transistor in a semiconductor device on which the bipolar transistor and the DMOS transistor are loaded. <P>SOLUTION: The semiconductor device has a p<SP>-</SP>silicon substrate 1, n<SP>-</SP>epitaxial growth layers 7a to 7c on the substrate 1, field insulating films 54a to 54h on the surface of the growth layer 7a, an n-p-n transistor formed on the growth layer 7a, a p-n-p transistor formed on the growth layer 7b, the DMOS transistor on the growth layer 7c and a resistor. The DMOS transistor contains an n<SP>+</SP>diffusion layer 21d as a source, a p-type diffusion layer 17e as a back gate region, and an n-type diffusion layer 67 in a low concentration as a drain and an n<SP>+</SP>diffusion layer 21e in a high concentration. <P>COPYRIGHT: (C)2005,JPO&NCIPI |
