发明名称 Cascade delta-sigma modulator
摘要 A delta-sigma modulation quantization loop, comprising an integration circuit for integrating the difference between an analog input signal and a feedback reference voltage, a local quantizer for quantizing the output of the integration circuit into a digital signal, and a DA converter for generating the feedback reference voltage from the digital output of the local quantizer, is used as a single stage, and a plurality of the stages are cascade-connected. In the second-stage and subsequent modulation quantization loops, the difference signal between the input of the local quantizer of the previous stage and the output of the DA converter of the previous stage is used as an analog input signal. The feedback reference voltages of the respective delta-sigma modulation quantization loops are set individually so as to be higher than the specified maximum voltage of the analog input signal to limit the gains of the respective delta-sigma modulation quantization loops. Gain setting devices are provided in a noise reduction circuit to roughly compensate the gains limited in the respective delta-sigma modulation quantization loops.
申请公布号 US2005001751(A1) 申请公布日期 2005.01.06
申请号 US20040865885 申请日期 2004.06.14
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 INUKAI FUMIHITO;YOKOYAMA AKIO;KOBAYASHI HITOSHI
分类号 H03M3/02;(IPC1-7):H03M3/00 主分类号 H03M3/02
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