发明名称 PHASE INTERPOLATOR FOR CONTROLLING OUTPUT DELAY PERIOD BY SWING WIDTH OF INPUT SIGNALS OUTPUTTING INTERPOLATION SIGNAL HAVING REDUCED JITTER COMPONENT
摘要 PURPOSE: A phase interpolator for controlling an output delay period is provided to prevent a change of phases of interpolation signals by reducing a time jitter. CONSTITUTION: A plurality of swing width control circuits(160,170) are used for receiving input signals and outputting swing signals having predetermined swing width in response to predetermined current control signals. A phase interpolation circuit(150) is used for outputting interpolation signals in response to the swing signals. The swing width of the swing signals is changed according to a change of levels of the current control signals. The phase interpolation circuit changes the phase of the interpolation signal when the swing width of the swing signals is changed.
申请公布号 KR20050000867(A) 申请公布日期 2005.01.06
申请号 KR20030041447 申请日期 2003.06.25
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 SOHN, YOUNG SOO
分类号 H03L7/00;(IPC1-7):H03L7/00 主分类号 H03L7/00
代理机构 代理人
主权项
地址