发明名称 MEMORY CELL ARRAY AND SEMICONDUCTOR MEMORY
摘要 <p><P>PROBLEM TO BE SOLVED: To obtain a semiconductor memory in which a memory region can be utilized to be divided arbitrarily. <P>SOLUTION: In the memory cell array of a ROM 1 being the semiconductor memory, memory cells 4 are arranged at intersection positions of row selecting lines 2 and column selecting lines 3. In such a memory cell array, transistors 5a, 5b for division are provided at corresponding positions in each column selecting line 3 so that three divided memory regions 8, 9, 10 are formed making a memory region including row selecting lines 2 of one or more as one unit. The transistors 5a, 5b for division control the column selecting line 3 to a conduction state and a non-conduction state by a corresponding dividing signal (ROM dividing signal 1) 6 and a dividing signal(ROM dividing signal 2) 7. and bisected regions of the region of the divided region 8 + divided region 9 and the divided region 10 are obtained. Also, bisected regions of the region of the divided region 8 and the divided region 9 + divided region 10 and the divided region 10 are obtained. <P>COPYRIGHT: (C)2005,JPO&NCIPI</p>
申请公布号 JP2005004846(A) 申请公布日期 2005.01.06
申请号 JP20030165606 申请日期 2003.06.10
申请人 RENESAS TECHNOLOGY CORP;RENESAS LSI DESIGN CORP 发明人 ABE TOSHIHIRO
分类号 G11C17/18;(IPC1-7):G11C17/18 主分类号 G11C17/18
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