发明名称 SUBSTRATE ENGINEERING FOR OPTIMUM CMOS DEVICE PERFORMANCE
摘要 An integrated semiconductor structure having different types of complementary metal oxide semiconductor devices (CMOS), i.e., PFETs and NFETs, located atop a semiconductor substrate, wherein each CMOS device is fabricated such that the current flow for each device is optimal is provided. Specifically, the structure includes a semiconductor substrate that has a (110) surface orientation and a notch pointing in a <001> direction of current flow; and at least one PFET and at least one NFET located on the semiconductor substrate. The at least one PFET has a current flow in a <110> direction and the at least one NFET has a current flow in a <100> direction. The <110> direction is perpendicular to the <100> direction. A method of fabricating such as integrated semiconductor structure is also provided.
申请公布号 US2005001290(A1) 申请公布日期 2005.01.06
申请号 US20030604003 申请日期 2003.06.20
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 CHAN VICTOR W.C.;LEONG MEIKEI;YANG MIN
分类号 H01L21/8238;(IPC1-7):H01L29/76;H01L21/823 主分类号 H01L21/8238
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