发明名称 SEMICONDUCTOR DEVICE AND ITS FABRICATING PROCESS
摘要 PROBLEM TO BE SOLVED: To control the threshold voltage of a field effect transistor while suppressing increase in the number of fabrication steps. SOLUTION: Using ion implantation N for forming the source/drain of an N channel field effect transistor, an over impurity introduction layer 10 is formed in a polysilicon gate 5 and N type impurities contained in the over impurity introduction layer 10 are diffused in the direction of an active region 7 in the polysilicon gate 5. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005005457(A) 申请公布日期 2005.01.06
申请号 JP20030166636 申请日期 2003.06.11
申请人 SEIKO EPSON CORP 发明人 SATO TETSUMASA
分类号 H01L21/28;H01L21/8238;H01L27/092;H01L29/423;H01L29/49;H01L29/78;(IPC1-7):H01L21/823 主分类号 H01L21/28
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