发明名称 Manufacturing method of semiconductor integrated circuit device
摘要 In the forming process of buried wirings by filling wiring trenches formed in an insulator with a conductive film mainly made of Cu, the buried wirings are formed to have a uniform-height regardless of the width and density of the wiring trenches. When polishing a barrier conductor film comprised of a Ta film in the CMP process for forming the buried wirings, the polishing agent which can control the removal rate of the underlying insulator of a silicon oxide film relative to the barrier conductor film to almost one twentieth or less is used as the slurry, and the pad made of polyurethane with a hardness of 75 degrees or more measured by the Type E durometer in conformity with the JIS K6253, which is comprised of the foam including non-uniform pores with a diameter of about 150 mum or larger and a density of about 0.4-0.6 g/cm<3>, is used as the polishing pad.
申请公布号 US2005003670(A1) 申请公布日期 2005.01.06
申请号 US20040863776 申请日期 2004.06.09
申请人 RENESAS TECHNOLOGY CORP. 发明人 YAMADA YOHEI;KONISHI NOBUHIRO
分类号 H01L21/3205;B24B37/04;H01L21/02;H01L21/304;H01L21/306;H01L21/321;H01L21/768;(IPC1-7):H01L21/476;H01L21/302;H01L21/461 主分类号 H01L21/3205
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