| 摘要 |
<p>A modular and arithmetic logic unit (ALU) for performing logic functions of AND, OR and exclusive OR and arithmetic functions of binary and decimal subtract/add where decimal subtract/add operates with both zoned decimal and decimal data formats. A pair of registers holds the two operands. The outputs of one register feed complement circuitry and the outputs of the other register together with outputs from the complement circuitry go into a subtractor and into borrow look ahead circuitry. The subtractor feeds the borrow look ahead circuitry and function control logic. The outputs from the borrow look ahead circuitry are sent back into the subtractor and one of the outputs is borrow out. The data outputs are taken from a six correct circuit having inputs from the function control logic. Control signals appropriately control the operation of the complement circuit, subtractor, borrow look ahead circuit, function control logic and the six correct circuit.</p> |
