| 摘要 |
An area-efficient stack capacitor for use in an integrated circuit comprises, in one embodiment, a layer of elemental platinum (Pt) as a bottom electrode, a layer of hemispherical grained poly Si on top of the Pt bottom electrode, a second layer of Pt deposited over the layer of hemispherical grained poly Si, a layer of dielectric deposited over the second layer of Pt, and a third layer of Pt deposited over the dielectric layer, where the third layer of Pt acts as upper electrode.
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